Gallery less than 1 minute read Published: December 29, 2025 Authors: Ming Gong, Charlotte ChenHere’s a picture page, just for funIntroInverterProject PlanAdder and ShifterSRAMPLA, Control, Data, OverallGalleryOverall Layout1x2x4x8x16xVarious LayersOD-CO-POPO-CO-M1M1-VIA1-M2M2-VIA2-M3M3-VIA3-M4Share on Bluesky Facebook LinkedIn X (formerly Twitter) Previous Next
Embedded Project: CircuitSim 5 minute read Published: May 18, 2025A walkthrough of our Embedded final project: Circuit Simulator on FPGA
Demystifying Cache—From Bytes to Tags 7 minute read Published: May 01, 2025Breaking down cache address bits is tricky. In this guide, we’ll step through in detail how to partition a 32-bit address and work through some problems to test your understanding :)