Gallery less than 1 minute read Published: December 29, 2025 Authors: Ming Gong, Charlotte ChenHere’s a picture page, just for fun 4321 VLSI series 1Intro 2Inverter 3Project Plan 4Adder and Shifter 5SRAM 6PLA, Control, Data, Overall GalleryOverall Layout1x2x4x8x16xVarious LayersOD-CO-POPO-CO-M1M1-VIA1-M2M2-VIA2-M3M3-VIA3-M4 ← PreviousPLA, Control, Data, OverallShare on Bluesky Facebook LinkedIn X (formerly Twitter) Previous Next
Peeling a Scope: The Layers of PyVISA 7 minute read Published: October 16, 2026One line of Python sets a scope to 500 mV/div. Here’s every layer it passes through, from the PyVISA class hierarchy down to USB permissions on a PYNQ board.
Elmore Delay Analysis 6 minute read Published: October 12, 202618-4/622 Recitation 01: a step-by-step walkthrough of Elmore delay on a midterm problem, from switch-level RC models to wire pi-models.