Handwritten Notes Style Guide

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Handwritten Note-Taking Style Guide

This document captures the structural, visual, and textual style of engineering and physics handwritten notes taken in Notability. Use it as a framework for replicating this dense, visual, and efficient style.


Document Layout & Note Structure

Notes are optimized for high spatial density, packed tightly into cohesive blocks or continuous documents to fit complex conceptual units onto a single view.

  • Top-Level Banners: Every major system or topic begins with a bold, standalone, prominent title banner at the top of the section acting as a clear entry point (e.g., Linear Estimation (Weiner-Hopf), Analog Modulation, Single-cycle MIPS processor).
  • Sequential Stage Marking: Multi-step processing pipelines, structural loops, or proof sequences are rigorously tracked using circled digits (, , , , ) to establish a clear programmatic flow down the page.

  • Separator Rules: Horizontal divider lines or axis cross-sections are drawn across pages to segment sub-topics completely or to block off multi-stage proofs (e.g., separating the mathematical derivation of the Bose-Einstein distribution from the physical modeling of an ideal Bose gas).

Page Splits & Multi-Column Layouts

To maximize visual density and keep derivations co-located with their physical frameworks, pages are systematically split into parallel spatial columns:

  • Asymmetric Partitioning: The page split dynamically adjusts based on the size of the visual model or datapath architecture.

  • Mathematical vs. Visual Columns: The primary mathematical derivations, signal transformations, or pipeline instructions run continuously down the left column, while the right side is explicitly reserved for accompanying visual validation (such as architectural diagrams, vector charts, or waveform sweeps).

  • Vertical Segmentation: Vertical ink strokes or distinct, unlined spatial gaps are utilized to partition self-contained problem checks or side-calculations away from the primary system path without changing pages.


Hierarchies

Headings function as immediate conceptual tags, not full phrases. They are strictly telegraphic.

Major sections are written as punchy, isolated topic titles or physical models:

  • ## Scaling (Dennard), ## Linear Estimation (Weiner-Hopf), ## MOS/FET
  • Every major topic begins with a bold, standalone banner title at the top of the section

Subsections immediately specify the constraint or design domain being analyzed:

  • ### Short channel, ### Body effect if $U_{SB}\ne 0$, ### PMOS load SS
  • Sub-banners are placed directly above algorithmic implementations, derivations, or circuit topologies: Matched Filter (North), RHP zero compensation

Telegraphic labels appear inside diagrams to mark functional blocks: Bias point, Filter, Miller effect, High freq

Formatting in handwriting: Headings are underlined or boxed to separate them from surrounding dense text blocks.


Prose Style

Sentence structures are abandoned in favor of lecture-note fragments with extreme word economy. Articles, helping verbs, and transition words are completely omitted.

Direct fact statements — immediate technical rules as the first word:

  • Material Si us 35 vs wide-bondgap
  • As size ↓, # dopants countable
  • Want filter Pn(f) w/ Hw() whitened Pn
  • Change amp/phase/freq of carrier

Conditional and system assertions use explicit shorthand:

  • if A >> n_R(t), as v -> c, if m=1

Inline directives guide step-by-step verification:

  • Watch overflow!, Check: 1 unit, Need to tune μ, safer to bias I_D, not V_GS

Shorthand Abbreviations

ShorthandMeaning
E.example
w/ / w/owith / without
vsversus
anaanalogous
fucn. / vars.function / variables
clkclock
inv.inverter / inversion
dev.device
sys.system
sat / lin / depsaturation / linear / depletion
freqfrequency
mat.matrix
fwdforward
den. / num.denominator / numerator
cascascade
instrMIPS instruction designations

Implication & Evaluation Symbols

Causality, performance metrics, and system behavior are tracked using a strict symbolic language:

SymbolMeaning
Leads to, implies, evaluates to, transitions to
Increase, high state, rise, growth; curved for nonlinear growth
Decrease, low state, fall, minimization
~Proportional to, or related to
Advantage, benefit, “pro” of a design choice
Disadvantage, drawback, pitfall, “con”
→ :)Favorable or highly optimal design result
→ :(Unfavorable result, hazard, or performance penalty

Emphasis & Visual Hierarchy

1. Color Coding

Color is used functionally to establish a clear hierarchy over dense text and prevent visual clutter.

  • Base (Black)
    • Core derivations, main formulas, structural block text, and initial diagrams.
  • Emphasis (Red)
    • Critical points, error-prone steps, or structural changes.
    • Examples: State-change interventions, signal alterations (e.g., bit flips, adding $+1$).
  • Annotation & Function (Blue)
    • Auxiliary notes written over graphs, trace paths, signal names, and layout additions.
    • Linked quotes, logical connections, and functional abbreviations (e.g., Ex., ana., vs.).
  • Secondary (Orange / Green)
    • Section headings.
    • Ancillary markings when an extra color layer is needed beyond blue annotations.

2. Formatting & Framing Elements

Visual ElementTarget Application
Full Framing BoxesDefinitive analytical outcomes, optimum filter designs, or final coordinate transformations.
Color Highlights (Neon Yellow/Green)Core exam concepts and high-yield testing points.
UnderlinesKey foundational tracking terms or dimensional invariants (e.g., WSS, invariant interval, ideal diode). Functions similarly to red ink for structural grounding.

Math and Logic Elements

Lists & Implication Chains

Standard bullet lists are rarely used. Notes rely on causal chains, transformation notations, and structural mapping instead.

Implication and processing paths — directional arrows track variable flow, algorithmic conversions, or state consequences:

Pn(f)|Hw(f)|^2 = N_0/2  →  H_MF(f) = ...
Switch off  →  V = L dt/di

Domain shift notation — explicit operator tags mark frame transformations: \(h_{mf}(t) \stackrel{\mathcal{F}^{-1}}{\longleftrightarrow} S^*(-f)\, e^{-j2\pi fT}\)


Logic & Execution Blocks

Algorithmic validation rules or architecture checks are written as clean plaintext logic strings:

Forwarding Condition:
if (RegWriteM) and (rsE != 0) and (rsE == WriteRegM)  →  FwdAE = 10

Stall Trigger:
lwstall = MemToRegE and ((rsD == rtE) or (rtD == rtE))

Mathematical Notation

Math is highly integrated into text flow using direct algebraic transitions rather than verbal descriptions.

Inline parameters embedded directly in prose:

  • $E_g = 1.1\,\text{eV}$, $np = n_i^2$, $I_{sat} \sim V_{ov}$

Calculus and matrix system models — compact and clean: \(\frac{dE}{dx} = \frac{\rho}{K_s \epsilon_0}\) \(\underline{\dot{x}} = \underline{A}\,\underline{x} + \underline{b}f\)

Rational function steps — long-division polynomial remainders and partial fraction expansions mapped out step by step.

Statistical operators — expectation explicitly encased:

  • $E[\epsilon^2(t)]$, $E[|x|]$

Calculus fields — vector derivatives and definite loop integrals: \(\oint_S \vec{E} \cdot d\vec{a} = \frac{Q_\text{enc}}{\epsilon_0}\) \(\int_{-\infty}^{\infty} f(x)\,\delta(x-a)\,dx = f(a)\)

System matrices — multi-node parameter equations grouped into arrays before solving: \(\begin{bmatrix} \frac{1}{R} + sC & -\frac{1}{R} \\ \frac{1}{R} & sC \end{bmatrix} \begin{bmatrix} V_1 \\ V_2 \end{bmatrix} = \begin{bmatrix} -\frac{1}{R_1} \\ 0 \end{bmatrix} V_\text{in}(s)\)


Diagrams & Visual Annotations

Visual sketches are primary note components and fall into three categories:

1. Device Physics & Waveform Plots

  • Axes and traces: Clean lines with slopes (slope=μ), saturation thresholds ($V_{ov},\, \text{sat} \approx 0.2\,\text{V}$), and asymptotic limits annotated directly on the curve
  • Critical markers: Operational zones labeled inline (cond. for conduction band, val. for valence band, inversion boundaries)
  • Reference points: Hand-drawn stars ($\star$) mark critical design reference points

2. Circuit & Layout Sketches

  • Transistor stacks: Simplified logic configurations with sizing written next to gates (4W, 2W/W)
  • Physical layout templates: Stick-diagram representations

3. System & Signal Block Diagrams

  • Signal flow graphs: Summation nodes ($\Sigma$), integrators ($1/s$), and multipliers linked by directional arrows
  • Pipeline matrix mapping: Structural dependencies and hardware hazard bypass paths traced using colored interconnect pathways beneath code sequence columns
  • Hardware architecture blocks: Datapath layouts link PC, instr. mem., reg. file, ALU, and data mem. using directional buses with explicit bit-widths (31:26, 15:0, 32)
  • FSM state bubbles: Circles contain current states; edges are labeled X/Y for input/output transitions

Hand-Drawn Graphs & Waveforms

Note segments are consistently paired with illustrative spatial plots, signal sweeps, or device parameters:

  • Coordinate contexts: Angle overlays ($\theta, \phi, r\sin\theta$) map mathematical transformations onto physical systems
  • Signal & noise envelopes: Frequency parabolas, power spectrum drops, and noise distribution boundaries annotated with critical cutoffs ($\pm W$, $B_{FM}/2$)
  • Characteristic sweeps: Graphical intersections represent non-linear operating points (load lines crossing Shockley curves) or device response limits ($V_{out}$ vs $V_{in}$ switches)

Notices & Callouts

Marginal pitfalls — highlighted via bracketed indicators for hardware layout issues, scaling limitations, or parameter breakdowns:

  • DIBL: Drain Induced Barrier Lowering, RHP zero hurts PM

Status indicators — text markers for final evaluations:

  • → best outcome
  • Worst E[ε²] = s(t)²

Unresolved sections — open questions tagged inline:

  • ??? over unresolved mathematical links (e.g., dt' = ???)

Homework & Project References

Problem set solutions and diagnostic checks are integrated into the relevant architectural notes with sharp contextual markers:

  • HW1, HW2 All comp. give same pole..., Pn(f) = HW

Overall Tone

  • Authoritative and quantitative: Completely analytical and deterministic. Facts exist as direct system behaviors, mathematical definitions, or performance bottlenecks — no conversational assumptions.
  • Visual-logical balance: Mathematical proofs are paired directly with visual layout configurations — a relativity derivation alongside a Minkowski spacetime diagram, an op-amp poles transformation paired with an open-loop Bode plot sweep.
  • Efficiency-focused: Physical limitations and optimization trade-offs are front and center — power constraints, scaling penalties ($1/K$), timing hazards ($t_{setup}$, $t_{hold}$), and system stability margins.